Tarek Ould Bachir

Floating-Point Engines for the FPGA-Based Real-Time Simulation of Power Electronic Circuits

Publication date : Jun 2011
Paper File : Floating-Point Engines for the FPGA-Based.pdf



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Author(s)

Tarek Ould Bachir, Jean-Pierre David, Jean Mahseredjian, Christian Dufour,

Abstract

The real-time simulation of power electronic circuits is challenging for several reasons. A PC-based simulation can hardly achieve time-steps below 5-10 μs: this yields a limit on the maximal power electronic switching frequencies that can be accurately simulated using standard methods. This paper presents a design methodology for the hardware implementation of high-performance FPGA-based floating-point calculation engines aimed for the real-time simulation of power electronic systems. The power electronic circuits are modeled using the associated discrete circuit technique. A calculation time step of 100 ns is achieved for a boost converter, and the simulation results are validated against the SimPowerSystems library. The paper also discusses emerging paradigms for the FPGA-based floatingpoint computation that favor optimal performance and offer near double precision arithmetic at a minimal hardware cost.

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A Finite Element Analysis High-Speed PMSM Motor Drive Emulator on FPGA with Full Fault Testing Capabilityd Solver within SimPowerSystems

Publication date : Apr 2011
Paper File : EPE11_DualFPGADrive.pdf



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Author(s)

Tarek Ould Bachir, Christian Dufour,

Abstract

Presented in this paper is an advanced Finite-Element-Analysis (FEA) based PMSM motor drive emulator implemented on FPGA. FEA simulation of PMSM improves the accuracy with regards to classix Park DQ model by enabling the inclusion of saturation and non-sinusoidal back-EMF into the simulation. Implementation on an FPGA minimizes the model latency during closed-loop testing with an ECU. The drive model is an improved version of previous simulator implementation in many aspects: first, a nodal solver is used for the simulation of the inverter, thus enabling all type of fault inclusion like IGBT open/short circuit, motor terminal short circuit or even diode malfunction in the IGBT/Diode pairs. Secondly, the DC-link model is extended to include its inductance. Finally, the FEA-computed torque is now computed inside the FPGA

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